Logic element architecture for generic logic chains in programmable devices
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United States of America Patent
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May 7, 2013
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Sep 24, 2008
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Sep 24, 2008
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Abstract
A reconfigurable device includes an arrangement of a plurality of cells and routing resources for transmitting signals between the cells. The plurality of cells comprises carry-select reuse cells, each of the carry-select reuse cells configured to provide for performing non-arithmetic operations using a reuse arithmetic carry chain interconnecting adjacent cells.
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