System and method for implementing periodic early discard in on-chip buffer memories of network elements

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United States of America Patent

PATENT NO 8441927
APP PUB NO 20120182870A1
SERIAL NO

13006142

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Abstract

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An advance is made over the prior art in accordance with the principles of the present invention that is directed to a new approach for a system and method for a buffer management scheme called Periodic Early Discard (PED). The invention builds on the observation that, in presence of TCP traffic, the length of a queue can be stabilized by selection of an appropriate frequency for packet dropping. For any combination of number of TCP connections and distribution of the respective RTT values, there exists an ideal packet drop frequency that prevents the queue from over-flowing or under-flowing. While the value of the ideal packet drop frequency may quickly change over time and is sensitive to the series of TCP connections affected by past packet losses, and most of all is impossible to compute inline, it is possible to approximate it with a margin of error that allows keeping the queue occupancy within a pre-defined range for extended periods of time. The PED scheme aims at tracking the (unknown) ideal packet drop frequency, adjusting the approximated value based on the evolution of the queue occupancy, with corrections of the approximated packet drop frequency that occur at a timescale that is comparable to the aggregate time constant of the set of TCP connections that traverse the queue.

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Patent Owner(s)

Patent OwnerAddress
RPX CORPORATIONFOUR EMBARCADERO SUITE 4000 SAN FRANCISCO CA 94111

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Francini, Andrea Mooresville, US 37 703

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