Microprocessor with first processor for debugging second processor

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United States of America Patent

PATENT NO 8443175
APP PUB NO 20110010530A1
SERIAL NO

12748753

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Abstract

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A microprocessor integrated circuit includes first and second processors, an internal memory accessible by the first and second processors, and a bus interface unit configured to interface to a bus external to the microprocessor for providing access to a memory external to the microprocessor. The bus interface unit, external bus, and external memory are accessible by the second processor but are inaccessible by the first processor. The first processor writes debug information to the internal memory. The first processor detects an event and provides a notification of the event to the second processor. The second processor, coupled to the bus interface unit, executes microcode in response to the event notification received from the first processor. The microcode reads the debug information from the internal memory and writes the debug information to the external memory via the bus interface unit and external bus for use in debugging the second processor.

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Patent Owner(s)

Patent OwnerAddress
VIA TECHNOLOGIES INCNEW TAIPEI CITY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Jui-Shuan Austin, US 4 72
Henry, G Glenn Austin, US 410 6997

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