Coreless substrate having filled via pad and method of manufacturing the same
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United States of America Patent
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May 21, 2013
Grant Date -
Apr 22, 2010
app pub date -
Jan 22, 2009
filing date -
Oct 20, 2008
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Disclosed herein is a coreless substrate having filled via pads and a method of manufacturing the same. Insulating layers are formed on both sides of a build-up layer, and via-pads are embedded in the insulating layers such that the via-pads are flush with the insulating layers. The via pads are not separated from a substrate, and thus reliability of the pads is increased. Flatness of bumps is increased, and thus bonding of flip chips becomes easy.
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