Semiconductor device including process monitoring pattern having overlapping input/output pad array area
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United States of America Patent
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May 21, 2013
Grant Date -
Aug 4, 2011
app pub date -
Dec 8, 2010
filing date -
Feb 4, 2010
priority date (Note) -
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Abstract
The semiconductor device includes a process monitoring pattern and an input/output (I/O) pad array area, the process monitoring pattern including a lower layer having a peripheral area surrounding a first internal area, the first internal area exposed by an internal open area, an external structure on the peripheral area of the lower layer, and a first dam disposed in the peripheral area spaced apart from the external structure by an external open area, the first dam defining the first internal area. The peripheral area overlaps the input/output (I/O) pad array area of the semiconductor device.
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