Three-dimensional semiconductor memory device
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United States of America Patent
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May 21, 2013
Grant Date -
Jun 3, 2010
app pub date -
Nov 24, 2009
filing date -
Nov 25, 2008
priority date (Note) -
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Abstract
A three-dimensional semiconductor memory device includes word lines and gate interlayer insulation layers that are alternatively stacked on a semiconductor substrate while extending in a horizontal direction, a vertical channel layer that faces the word lines and extends upwardly from the semiconductor substrate, and a channel pad that extends from the vertical channel layer and is disposed on an uppermost gate interlayer insulation layer of the gate interlayer insulation layers.
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