Printed circuit board test assisting apparatus, printed circuit board test assisting method, and computer-readable information recording medium
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United States of America Patent
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May 21, 2013
Grant Date -
Jan 27, 2011
app pub date -
Jun 25, 2010
filing date -
Jul 22, 2009
priority date (Note) -
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Abstract
A printed circuit board test assisting apparatus includes an input part that has the attribute information of the wiring pattern input thereto; a degradation degree process part that obtains a degradation degree in signal characteristics in a wiring pattern corresponding to attribute information that is input to the input part, based on position information of the wiring pattern corresponding to the attribute information input to the input part, the position information and the size information of the pattern removed area, and the degradation degree information; and an extracting process part that extracts for an actual measurement test a wiring pattern that has a degradation degree equal to or more than a predetermined degree, from wiring patterns for which degradation degrees have been obtained by the degradation degree process part.
First Claim
Family
- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| FUJITSU LIMITED | KAWASAKI |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Tsubamoto, Daita | Kawasaki, JP | 17 | 38 |
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| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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