Delay locked loop and method for driving the same
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United States of America Patent
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May 21, 2013
Grant Date -
Jun 30, 2011
app pub date -
Apr 7, 2010
filing date -
Dec 29, 2009
priority date (Note) -
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Abstract
A delay locked loop includes a delay pulse generation unit, a coding unit, and a delay line. The delay pulse generation unit is configured to generate a delay pulse having a certain width. The coding unit is configured to code the delay pulse and output a code value. The delay line is configured to delay an input clock by the code value, and generate a delayed locked clock. The delay pulse has a logic high level state during a third period equivalent to a difference between a first period, which corresponds to an integer multiple of the input clock, and a second period, which is a certain replica delay period.
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