Nonvolatile semiconductor memory device and method for producing the same
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United States of America Patent
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May 28, 2013
Grant Date -
Jun 16, 2011
app pub date -
Nov 4, 2010
filing date -
Dec 16, 2009
priority date (Note) -
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status (Latency Note)
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Abstract
A first opening and a second opening are formed at the same time over a first metal wiring and a second metal wiring, respectively which are provided as the same layer on a substrate on which a transistor for selecting a memory cell is formed. Then, a variable resistor and an upper electrode are deposited on a whole surface so as to completely fill the first opening with the upper electrode but not to completely fill the second opening with it. Thereafter, a variable resistive element is formed in the first opening and a via hole to connect to the third metal wiring (bit line), in the second opening, at the same time, by performing back-etching until a surface of the second metal wiring is exposed at a bottom of the second opening.
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