Device performance parmeter tuning method and system

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United States of America Patent

PATENT NO 8452439
APP PUB NO 20120239178A1
SERIAL NO

13048282

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Abstract

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A method comprises computing respective regression models for each of a plurality of failure bins based on a plurality of failures identified during wafer electrical tests. Each regression model outputs a wafer yield measure as a function of a plurality of device performance variables. For each failure bin, sensitivity of the wafer yield measure to each of the plurality of device performance variables is determined, and the device performance variables are ranked with respect to sensitivity of the wafer yield measure. A subset of the device performance variables which have highest rankings and which have less than a threshold correlation with each other are selected. The wafer yield measures for each failure bin corresponding to one of the selected subset of device performance variables are combined, to provide a combined wafer yield measure. At least one new process parameter value is selected to effect a change in the one device performance variable, based on the combined wafer yield measure. The at least one new process parameter value is to be used to process at least one additional wafer.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTDHSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Kun-Ming Hsinchu, TW 7 49
Chu, I-Ching Hsinchu, TW 1 10
Hsieh, Dung-Yian Hsinchu, TW 1 10
Lin, Chun-Hsien Hsinchu, TW 286 2079
Lin, Hui-Ru Fengyuan, TW 1 10
Mou, Jong-I Hsinpu Township, Hsinchu County, TW 55 447
Wang, Jo Fei Hsinchu, TW 24 186
Wu, Sunny Zhudong Town, TW 27 362

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