Layouts of POLY cut openings overlapping active regions

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8455354
APP PUB NO 20120258592A1
SERIAL NO

13081115

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method of forming integrated circuits includes forming a mask layer over a gate electrode line, wherein the gate electrode line is over a well region of a semiconductor substrate; forming an opening in the mask layer, wherein a portion of the gate electrode line and a well pickup region of the well region are exposed through the opening; and removing the portion of the gate electrode line through the opening.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Jung-Hsuan Hsin-Chu, TW 48 122
Chen, Yen-Huei Jhudong Township, TW 294 1754
Liao, Hung-Jen Hsin-Chu, TW 245 1267
Tien, Li-Chun Tainan, TW 276 2262

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation