System and method for powering an information handling system in multiple power states
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United States of America Patent
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Jun 4, 2013
Grant Date -
Feb 16, 2012
app pub date -
Oct 26, 2011
filing date -
Oct 20, 2008
priority date (Note) -
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Abstract
Power is supplied to an information handling system chipset with a single voltage regulator having dual phases. A first phase of the voltage regulator provides power to a low power state power rail in an independent mode to support a low power state, such as a suspend or hibernate state. A second phase of the voltage regulator provides power to a run power state power rail in combination with the first phase by activation of a switch, such as a MOSFET load switch, that connects the low power state power rail and the run power state power rail. Voltage sensed from both power rails is applied to control voltage output so that the run power state power rail is maintained within more precise constraints than the low power state power rail.
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