Multiple layers of memory implemented as different memory technology

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United States of America Patent

PATENT NO 8456880
APP PUB NO 20100195363A1
SERIAL NO

12653853

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Abstract

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Circuits and methods that use third dimension memory as a different memory technology are described. The third dimension memory can be used for application specific data storage and/or to emulate conventional memory types such as DRAM, FLASH, SRAM, and ROM or new memory types as they become available. A processor-memory system implements a memory operable as different memory technologies. The processor-memory system includes a logic subsystem and a memory subsystem, which includes third dimension memory cells. The logic subsystem implements memory technology-specific signals to interact with the third dimension memory cells as memory cells of a different memory technology. As such, the memory subsystem can emulate different memory technologies. The logic subsystem can be fabricated FEOL on a substrate and the memory subsystem can be fabricated BEOL directly on top of the substrate. An interlayer interconnect structure can electrically couple the logic subsystem with the memory subsystem.

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Patent Owner(s)

Patent OwnerAddress
UNITY SEMICONDUCTOR CORPORATION255 SANTA ANA COURT SUNNYVALE CA 94085

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Norman, Robert Pendleton, US 134 2485

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