Process for testing the resistance of an integrated circuit to a side channel analysis
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United States of America Patent
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Jun 4, 2013
Grant Date -
Oct 6, 2011
app pub date -
Mar 31, 2010
filing date -
Mar 31, 2010
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Abstract
A process for testing an integrated circuit includes collecting a set of points of a physical property while the integrated circuit is executing a multiplication, dividing the set of points into a plurality subsets of lateral points, calculating an estimation of the value of the physical property for each subset, and applying to the subset of lateral points a step of horizontal transversal statistical processing by using the estimations of the value of the physical property, to verify a hypothesis about the variables manipulated by the integrated circuit.
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