Memory module and layout method therefor
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United States of America Patent
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Jun 11, 2013
Grant Date -
Nov 8, 2012
app pub date -
Jul 16, 2012
filing date -
Dec 24, 2008
priority date (Note) -
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Abstract
The present invention provides a novel wiring method for LR-DIMM of VLP type that conforms to LR-DIMM technology. The LR-DIMM comprises a plurality of DRAMs mounted on a board, two connectors mounted on the board for receiving data, and a buffer device mounted on the board for redriving data applied to the two connectors to supply the data to the plurality of DRAMs. The buffer device is located near the center of the board on which the two connectors are arranged at both ends thereof, and supplies data from each connector to DRAMs arranged on the opposite side to the connector.
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