Method and apparatus for addressing memory arrays
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 11, 2013
Grant Date -
Sep 13, 2012
app pub date -
Mar 11, 2011
filing date -
Mar 11, 2011
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
The present description relates to non-volatile memory arrays and the operation thereof In at least one embodiment, the non-volatile memory array may include a plurality of memory modules coupled in a daisy chain with enable in/out signals, and a single chip enable signal coupled in parallel to each memory module. With such a configuration, all memory units within each of the memory modules of each memory array may be addressed with the single chip enable signal.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully