Non-volatile memory device capable of reducing floating gate-to-floating gate coupling effect during programming
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United States of America Patent
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Jun 11, 2013
Grant Date -
Sep 15, 2011
app pub date -
May 26, 2011
filing date -
Jun 6, 2006
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Abstract
A method for programming a non-volatile memory array comprising a plurality of memory cells. Each cell is adapted to store a lower and an upper page of data. The method: programs the lower page of predetermined memory cells with first predetermined data and the upper page with second predetermined data. One of the lower page or the upper page of the predetermined memory cells is reprogrammed with the first or second predetermined data, respectively.
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