Methods and apparatus for read-side intercell interference mitigation in flash memories
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United States of America Patent
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Jun 11, 2013
Grant Date -
Jun 16, 2011
app pub date -
Jun 30, 2009
filing date -
Jul 1, 2008
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Abstract
Methods and apparatus are provided for read-side intercell interference mitigation in flash memories. A flash memory device is read by obtaining a read value for at least one target cell; obtaining a value representing a voltage stored in at least one aggressor cell that was programmed after the target cell; determining intercell interference for the target cell from the at least one aggressor cell; and obtaining a new read value that compensates for the intercell interference by removing the determined intercell interference from the read value for the at least one target cell. The new read value can optionally be provided to a decoder. In an iterative implementation, one or more intercell interference mitigation parameters can be adjusted if a decoding error occurs.
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