System and method for improved automated semiconductor wafer manufacturing
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United States of America Patent
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Jun 11, 2013
Grant Date -
Jul 22, 2010
app pub date -
Nov 12, 2009
filing date -
Jan 22, 2009
priority date (Note) -
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Abstract
System and method for automated semiconductor manufacturing is provided. In accordance with one aspect of the present invention, a system for automated semiconductor wafer manufacturing includes a smart overlay control (SOC) database having empirical alignment data related to overlay alignment, and a simulation module communicatively coupled to the SOC database, the simulation module determining a simulated overlay alignment of a wafer on the plurality of photolithography tools in a tool bank based on the empirical alignment data stored in the SOC database. The system also includes a dispatch module communicatively coupled to the SOC database and the simulation module, the dispatch module controlling the dispatch of a wafer to one of a plurality of photolithography tools in a tool bank based at least in part on the simulated overlay alignment.
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