Pipeline configuration protocol and configuration unit communication

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United States of America Patent

PATENT NO 8468329
SERIAL NO

13491894

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Abstract

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In a method of synchronizing data processing of processor arrangement, responsive to reaching, during execution of a program, a barrier included in a program sequence, the processor arrangement halts the program execution until it is determined that all instructions preceding the barrier in the program sequence have been successfully scheduled for execution.

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Patent Owner(s)

Patent OwnerAddress
SCIENTIA SOL MENTIS AGNEUHOFSTRASSE 1 SCHINDELLEGI 8834

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baumgarte, Volker München, DE 33 912
Ehlers, Gerd Grasbrunn, DE 14 172
May, Frank München, DE 51 1707
Nückel, Armin Neupotz, DE 18 248
Vorbach, Martin München, DE 174 5665

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