Cache pre-fetch architecture and method
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United States of America Patent
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Jul 9, 2013
Grant Date -
N/A
app pub date -
Nov 23, 2009
filing date -
Nov 25, 2008
priority date (Note) -
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Abstract
Embodiments of the present disclosure provide a system on a chip (SOC) comprising a processing core, and a cache including a cache instruction port, a cache data port, and a port utilization circuitry configured to selectively fetch instructions through the cache instruction port and selectively pre-fetch instructions through the cache data port. Other embodiments are also described and claimed.
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