Method for modifying data more than once in a multi-level cell memory location within a memory array
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United States of America Patent
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Jul 30, 2013
Grant Date -
Aug 16, 2012
app pub date -
Apr 24, 2012
filing date -
Aug 22, 2006
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Abstract
A method and apparatus for marking a block of multi-level memory cells for performance of a block management function by programming at least one bit in a lower page of the memory cell block such that a first logic state is stored in the at least one bit in the lower page; programming at least one bit in an upper page of the memory cell block such that the first logic state is stored in the at least one bit in the upper page; reprogramming the at least one bit in the upper page such that the at least one bit transitions from the first logic state to a second logic state; identifying the first logic state in the at least one bit of a lower page and the transition of at least one corresponding bit in the upper page from the first logic state to the second logic state; and in response, marking the corresponding memory cell block for performance of a block management function.
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