Direct memory access engine physical memory descriptors for multi-media demultiplexing operations

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United States of America Patent

PATENT NO 8509254
APP PUB NO 20110320777A1
SERIAL NO

12824300

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Abstract

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The architecture and techniques described herein can improve system performance with respect to the following. Communication between two interdependent hardware engines, that are part of pipeline, such that the engines are synchronized to consume resources when the engines are done with the work. Reduction of the role of software/firmware from feeding each stage of the hardware pipeline when the previous stage of the pipeline has completed. Reduction in the memory allocation for software-initialized hardware descriptors to improve performance by reducing pipeline stalls due to software interaction.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gutierrez, Raul El Dorado Hills, US 14 85
Kareenahalli, Suryaprasad Folsom, US 23 154
Nemiroff, Daniel El Dorado Hills, US 55 744
Vembu, Balaji Folsom, US 314 2158

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