Integrated circuit having high pattern regularity
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United States of America Patent
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Nov 19, 2013
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N/A
app pub date -
Aug 23, 2011
filing date -
May 10, 2010
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Abstract
The invention provides a reduced complexity layout style based on applying a limited set of changes to an underlying repeated base template. With the templates properly defined in accordance with the characteristic features disclosed, the invention enables efficient implementation of logic circuitry, with a dramatic reduction in the pattern complexity (or number of unique layout patterns at each mask level) for realistically sized designs.
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