Method of forming low resistance gate for power MOSFET applications
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United States of America Patent
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Nov 26, 2013
Grant Date -
Jan 20, 2011
app pub date -
Sep 27, 2010
filing date -
Feb 10, 2006
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Abstract
A method for forming a trench gate field effect transistor includes forming, in a semiconductor region, a trench followed by forming a dielectric layer lining a sidewall and a bottom surface of the trench. The method also includes, forming a first polysilicon layer on the bottom surface of the trench. The method further includes, forming a conductive material layer on an exposed surface of the first polysilicon layer and forming a second polysilicon layer on an exposed surface of the conductive material layer. The method still further includes, performing rapid thermal processing to cause the first polysilicon layer, the second polysilicon layer and the conductive material layer to react.
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