Dynamic random access memory controller
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United States of America Patent
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Dec 3, 2013
Grant Date -
N/A
app pub date -
Dec 31, 2008
filing date -
Dec 31, 2008
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Abstract
A Dynamic Random Access Memory (DRAM) controller. The DRAM controller includes receiving a plurality of access requests from a plurality of user interfaces to access one or more DRAM devices. Further, the DRAM controller includes storing the plurality of access requests in a Content Addressable Memory (CAM). Furthermore, the DRAM controller includes updating at least one access request of the plurality of access requests to a Next Access Table. In addition, the DRAM controller includes determining at least one paramount access request of the plurality of access requests by a CAM based decision controller for employing a bypass operation in the CAM based decision controller, based on a plurality of pre-defined conditions. Further, the DRAM controller includes issuing the plurality of access requests to the one or more DRAM devices.
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