Hybrid integrated circuits and their methods of fabrication

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8629006
APP PUB NO 20080132007A1
SERIAL NO

11634039

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention provides architectures for hybrid integrated circuits and methods for producing these hybrid integrated circuits that contain both field programmable gate arrays and mask programmable gate arrays, a form of application specific integrated circuits. Methods for producing an integrated circuit that is field programmable as well as mask programmable include the steps of: designing wafer bank layers and finishing layers, where the wafer bank layers provide a plurality of selectable functional blocks; fabricating said wafer bank layers; designing mask programmed interconnect layers for said integrated circuit, where the interconnect layers interconnect selected ones of the plurality of functional blocks from the wafer bank layers; fabricating the interconnect layers on the wafer bank layers; and fabricating the finishing layers on the interconnect layers to produce the integrated circuit. Architectures for these integrated circuits can contain a field programmable gate array that is integrated with a mask programmable gate array in a ring structure.

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Patent Owner(s)

Patent OwnerAddress
AGATE LOGIC INC3 RESULTS WAY CUPERTINO CA 95014

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nicholson, Ronald Santa Clara, US 4 151
Winegarden, Steven Sunnyvale, US 3 17
Yu, John Jun Los Altos, US 2 6

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