Flexible SoC design verification environment

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United States of America Patent

PATENT NO 8639981
APP PUB NO 20130055022A1
SERIAL NO

13220139

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Abstract

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A system and method of various SoC design verification techniques. A model of an SoC design is simulated in an emulator, and the emulator is connected to a debugger. Scripts are conveyed from a host computer to the debugger. The debugger translates the commands in the scripts from a first language into commands in a second language. The debugger then conveys the commands in the second language to the emulator. The debugger is also configured to utilize the same scripts to perform tests on an actual SoC on a development board.

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Patent Owner(s)

  • APPLE INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chong, Andrew K Cupertino, US 5 106

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