Preemptive memory repair based on multi-symbol, multi-scrub cycle analysis
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United States of America Patent
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Jan 28, 2014
Grant Date -
Jan 3, 2013
app pub date -
Jun 29, 2011
filing date -
Jun 29, 2011
priority date (Note) -
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Abstract
An apparatus includes a processor, a memory, and an error module operable on the processor. The error module is configured to perform a memory scrub of the memory across a scrub cycle of multiple scrub cycles. The error module is configured to identify correctable errors of symbols in the memory that are a result of accesses from a section of the memory in response to the memory scrub. The error module is configured to perform an analysis across the multiple scrub cycles, wherein the analysis comprises a determination whether at least two symbols across the multiple scrub cycles have at least one correctable error. The error module is configured to responsive to a determination that at least two symbols across the multiple scrub cycles have at least one correctable error, execute at least one repair of the memory that includes the section of memory.
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