Integrated circuit package with input capacitance compensation

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United States of America Patent

PATENT NO 8643168
SERIAL NO

13685385

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Abstract

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A ball-grid-array (BGA) package is disclosed that includes traces within a BGA substrate. At least one of the traces is configured to match a low-impedance load presented by a BGA substrate pad and associated circuitry on a flip-chip die to an impedance of a circuit board trace. Each configured trace includes a relatively narrow section coupling to a tapered section that widens from the relatively narrow section to join a relatively wider trace section.

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Patent Owner(s)

  • LATTICE SEMICONDUCTOR CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sharpe-Geisler, Brad San Jose, US 30 172
Wong, Ban P Milpitas, US 7 29

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