Method and apparatus for communication between two or more processing elements

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United States of America Patent

PATENT NO 8645959
APP PUB NO 20060225074A1
SERIAL NO

11095341

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Abstract

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A technique for performing barrier synchronization among a plurality of program threads. More particularly, at least one embodiment of the invention keeps track of completed tasks associated with a number of program threads using bits within a barrier register that can be updated and reassigned without incurring the amount of bus traffic as in the prior art.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baum, Allen Palo Alto, US 10 472
Crawford, John Saratoga, US 103 1068
Vaid, Kushagra San Jose, US 30 893

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