Stackable non-volatile resistive switching memory devices
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United States of America Patent
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Feb 11, 2014
Grant Date -
Mar 28, 2013
app pub date -
Nov 16, 2012
filing date -
Aug 23, 2010
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Abstract
A memory device includes a first plurality of memory cells arranged in a first crossbar array, a first thickness of dielectric material overlying the first plurality of memory cells, and a second plurality of memory cells arranged in a second crossbar array overlying the first thickness of dielectric material. The memory device further includes a second thickness of dielectric material overlying the second plurality of memory cells. In a specific embodiment, the memory device further includes a Nth thickness of dielectric material overlying an Nth plurality of memory cells, where N is an integer ranging from 3 to 8.
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