Resonant clock distribution network architecture with programmable drivers
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United States of America Patent
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Feb 25, 2014
Grant Date -
Jun 16, 2011
app pub date -
Oct 12, 2010
filing date -
Oct 12, 2009
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Abstract
A resonant clock distribution network architecture is proposed that uses clock drivers of programmable size and reference clocks of programmable duty cycle to achieve a target clock rise time and clock amplitude with low energy consumption when operating in any one of multiple clock frequencies in resonant or non-resonant mode. Such a network is generally applicable to semiconductor devices with various clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs.
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