Independent orthogonal error correction and detection
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United States of America Patent
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Feb 25, 2014
Grant Date -
Apr 11, 2013
app pub date -
Oct 7, 2011
filing date -
Oct 7, 2011
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Abstract
A data memory is organized as a logical matrix having multiple virtual data words. Along with the physical representation of the data as being associated with physical memory cells, other virtual data words and their virtual check bits are formed that intersect (logically) with the real data word in a multi-dimensional array. Each of these virtual words can possess errors that can be quickly corrected using independent EDAC methodology. The validity of the virtual word can be used to verify the validity of a single bit in the real word thus correcting multiple bit errors.
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