Method of patterning a semiconductor device with hard mask
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Mar 4, 2014
Grant Date -
Apr 5, 2012
app pub date -
Sep 30, 2011
filing date -
Oct 4, 2010
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
There is provided a method of manufacturing a semiconductor device. In the method, a gate insulation layer including a high-k dielectric material is formed on a substrate. An etch stop layer is formed on the gate insulation layer. A metal layer is formed on the etch stop layer. A hard mask including amorphous silicon is formed on the metal layer. The metal layer is patterned using the hard mask as an etching mask to form a metal layer pattern.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully