Method of depositing a diffusion barrier for copper interconnect applications

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United States of America Patent

PATENT NO 8679972
SERIAL NO

13904464

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Abstract

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The present invention pertains to methods for forming a metal diffusion barrier on an integrated circuit wherein the formation includes at least two operations. The first operation deposits barrier material via PVD or CVD to provide some minimal coverage. The second operation deposits an additional barrier material and simultaneously etches a portion of the barrier material deposited in the first operation. The result of the operations is a metal diffusion barrier formed in part by net etching in certain areas, in particular the bottom of vias, and a net deposition in other areas, in particular the side walls of vias. Controlled etching is used to selectively remove barrier material from the bottom of vias, either completely or partially, thus reducing the resistance of subsequently formed metal interconnects.

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Patent Owner(s)

  • NOVELLUS SYSTEMS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Danek, Michal Cupertino, US 112 8777
Klawuhn, Erich Los Altos, US 9 483
Rozbicki, Robert Germantown, US 38 3030

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