Semiconductor constructions and methods of forming semiconductor constructions
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United States of America Patent
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Mar 25, 2014
Grant Date -
Jan 9, 2014
app pub date -
Sep 4, 2013
filing date -
May 25, 2012
priority date (Note) -
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Abstract
Some embodiments include methods in which first insulative material is formed across a memory region and a peripheral region of a substrate. An etch stop structure is formed to have a higher portion over the memory region than over the peripheral region. A second insulative material is formed to protect the lower portion of the etch stop structure, and the higher portion is removed. Subsequently, at least some of the first and second insulative materials are removed. Some embodiments include semiconductor constructions having a first region with first features, and a second region with second features. The first features are closer spaced than the second features. A first insulative material is over the second region and an insulative structure is over the first insulative material. The structure has a stem joined to a bench. The bench has an upper surface, and the stem extends to above the upper surface.
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