Performing a multiply-multiply-accumulate instruction

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United States of America Patent

PATENT NO 8683183
APP PUB NO 20130179661A1
SERIAL NO

13783963

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Abstract

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In one embodiment, the present invention includes a processor having multiple execution units, at least one of which includes a circuit having a multiply-accumulate (MAC) unit including multiple multipliers and adders, and to execute a user-level multiply-multiply-accumulate instruction to populate a destination storage with a plurality of elements each corresponding to an absolute value for a pixel of a pixel block. Other embodiments are described and claimed.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sprangle, Eric Austin, US 38 726

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