Couplings within memory devices

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United States of America Patent

PATENT NO 8693231
APP PUB NO 20120258574A1
SERIAL NO

13495287

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Abstract

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A memory device includes a first bit line coupled to a first source/drain region of a first multiplexer gate, a second bit line coupled to a first source/drain region of a second multiplexer gate, and a sensing device having an input coupled to a second source/drain region of the first multiplexer gate and a second source/drain region of the second multiplexer gate. The input of the sensing device is formed at a vertical level that is different than a vertical level at which at least one of the first and second bit lines is formed.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aritome, Seiichi Boise, US 291 8125
Goda, Akira Boise, US 301 4165

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