Synchronous global controller for enhanced pipelining

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United States of America Patent

PATENT NO 8693279
APP PUB NO 20130194884A1
SERIAL NO

13769757

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Abstract

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A system includes a memory block and a controller. The controller is adapted to skew a pre-charge signal for a bit line of the memory block. The controller can skew the pre-charge signal during a read operation or a write operation. The system can also include a sense amplifier in communication with a bit line of the memory block, and the sense amplifier can automatically shut off after indicating a sensed data state for the bit line. The controller may be a global controller or a local controller.

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Patent Owner(s)

  • AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Anvar, Ali Irvine, US 19 113
Terzioglu, Esin Aliso Viejo, US 132 992
Winograd, Gil I Aliso Viejo, US 67 437

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