Wear leveling for erasable memories

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United States of America Patent

PATENT NO 8694718
APP PUB NO 20110271030A1
SERIAL NO

13142487

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Abstract

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In accordance with some embodiments, wear leveling may be done based on the difference in age of discarded blocks and engaged blocks. Data is moved to an older discarded block from a younger engaged block. Two wear leveling bits may be used for each logical block, such that the wear leveling bits are used in alternating cycles.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Iaculo, Massimo San Marco Evangelista, IT 48 255
Pollio, Antonino Vico Equense, IT 23 171
Vitale, Ornella Cicciano, IT 7 73

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