Apparatus and method for data bypass for a bi-directional data bus in a hub-based memory sub-system
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United States of America Patent
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Apr 8, 2014
Grant Date -
Jan 3, 2013
app pub date -
Sep 12, 2012
filing date -
Feb 5, 2004
priority date (Note) -
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Abstract
A memory hub includes first and second link interfaces for coupling to respective data busses, a data path coupled to the first and second link interfaces and through which data is transferred between the first and second link interfaces, and further includes a write bypass circuit coupled to the data path to couple write data on the data path and temporarily store the write data to allow read data to be transferred through the data path while the write data is temporarily stored. A method for writing data to a memory location in a memory system is provided which includes accessing read data in the memory system, providing write data to the memory system, and coupling the write data to a register for temporary storage. The write data is recoupled to the memory bus and written to the memory location following provision of the read data.
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