System and method for data read of a synchronous serial interface NAND
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United States of America Patent
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Apr 8, 2014
Grant Date -
May 16, 2013
app pub date -
Jan 7, 2013
filing date -
Oct 17, 2007
priority date (Note) -
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Abstract
A method and system is disclosed for operating a NAND memory device. The NAND memory device is operated by transmitting serial peripheral interface signals from a host to a NAND memory device, whereby the signals are communicated to a NAND memory in the NAND memory device without modifying the signals into a standard NAND memory format. Similarly, a method and system is disclosed for receiving signals from the NAND memory device without modifying the signals from a standard NAND format into a serial format. The system also incorporates error detection and correction techniques to detect and correct errors in data stored in the NAND memory device.
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