Semiconductor device, and test method for same

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United States of America Patent

PATENT NO 8698140
APP PUB NO 20120280231A1
SERIAL NO

13521961

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Abstract

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It has been difficult to carry out a test and an analysis with respect to combinational logic circuits mounted across plural chips, and therefore, there is provided a flip-flop (31b) by use of which either of a scan chain within a semiconductor chip (LSI_B), and a scan chain across plural semiconductor chips (LSI_A and LSI_B) can be made up.

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Patent Owner(s)

  • HITACHI, LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ito, Kiyoto Kodaira, JP 23 196
Saen, Makoto Kodaira, JP 35 845
Tsunoda, Takanobu Kokubunji, JP 24 219

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