Super high-density module with integrated wafer level packages
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United States of America Patent
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Apr 15, 2014
Grant Date -
Jul 5, 2007
app pub date -
Feb 28, 2007
filing date -
May 21, 2002
priority date (Note) -
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Abstract
A wafer level package, and a semiconductor wafer, an electronic system, and a memory module that include one or more of the wafer level packages, and methods of fabricating the die packages on a wafer level, and integrated circuit modules that include one or more packages are provided. In one embodiment, the die package comprises a redistribution layer interconnecting two or more dies disposed on a substrate, typically a semiconductor wafer, the redistribution layer including a first trace connecting a bond pad of each of two dies, and a second trace connecting one of the bond pads of the two dies to a ball pad. The die package of the invention can comprise memory devices such as static random access memories (SRAMs), and can be incorporated into a variety of electronic systems as part of memory packages such as single in line memory modules (SIMMs) or dual in line memory modules (DIMMs).
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