Semiconductor element-embedded wiring substrate

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United States of America Patent

PATENT NO 8710639
SERIAL NO

13639735

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Abstract

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A wiring substrate in which a semiconductor element is built includes a semiconductor element; a peripheral insulating layer covering at least an outer circumferential side surface of this semiconductor element; and an upper surface-side wiring line provided on the upper surface side of the wiring substrate. The semiconductor element includes an internal terminal electrically connected to the upper surface-side wiring line on the upper surface side of the semiconductor element. This internal terminal includes a first conductive part exposed out of an insulating surface layer of the semiconductor element; an adhesion layer on this first conductive part; and a second conductive part on this adhesion layer. The adhesion layer covers an exposed surface of the first conductive part, and is formed on a portion of the insulating surface layer around the exposed surface of the first conductive part, and the adhesion layer extends around the outer side of an outer edge of this second conductive part so as to surround the second conductive part.

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Patent Owner(s)

  • NEC CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kikuchi, Katsumi Minato-ku, JP 129 2093
Mori, Kentaro Minato-ku, JP 169 1265
Murai, Hideya Minato-ku, JP 53 1534
Nakashima, Yoshiki Minato-ku, JP 43 518
Yamamichi, Shintaro Minato-ku, JP 90 2232

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