Method and apparatus for determining disposition of via hole on printed circuit board
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United States of America Patent
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Jun 10, 2014
Grant Date -
Feb 16, 2012
app pub date -
Sep 15, 2011
filing date -
Jul 31, 2008
priority date (Note) -
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status (Latency Note)
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Abstract
A method for determining disposition of via hole on printed circuit board (PCB) includes the steps of: providing a PCB on which is disposed with a geometric layout and a via hole; providing a line on the PCB for intersecting the geometric layout to form a plurality of points of intersection; defining line segments by segmenting the line at each of the points of intersection to form a plurality of line segments; deleting some of the line segments having one end not being point of intersection for the geometric layout to form a plurality of segmented regions; searching a closed region by repeatedly searching region from any one of the points in the plurality of segmented regions; determining whether a closed region is a smallest closed region; determining whether a via hole is located within the smallest closed region.
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