System and apparatus for group floating-point inflate and deflate operations
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United States of America Patent
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Jul 1, 2014
Grant Date -
Jan 10, 2013
app pub date -
Jun 11, 2012
filing date -
Aug 16, 1995
priority date (Note) -
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Abstract
Systems and apparatuses are presented relating a programmable processor comprising an execution unit that is operable to decode and execute instructions received from an instruction path and partition data stored in registers in the register file into multiple data elements, the execution unit capable of executing group data handling operations that re-arrange data elements in different ways in response to data handling instructions, the execution unit further capable of executing a plurality of different group floating-point and group integer arithmetic operations that each arithmetically operates on the multiple data elements stored in registers in the register file to produce a catenated result that is returned to a register in the register file, wherein the catenated result comprises a plurality of individual results.
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