Performing a cyclic redundancy checksum operation responsive to a user-level instruction

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United States of America Patent

PATENT NO 8769386
SERIAL NO

13940665

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Abstract

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In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Berry, Frank L North Plains, US 31 502
King, Steven R Portland, US 50 782
Kounavis, Michael E Portland, US 89 923

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