Non-replacement gate nanomesh field effect transistor with epitixially grown source and drain
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United States of America Patent
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Jul 15, 2014
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N/A
app pub date -
Mar 12, 2013
filing date -
Mar 12, 2013
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Abstract
An alternating stack of two different semiconductor materials is patterned to include two pad regions and nanowire regions. A semiconductor material is laterally etched selective to another semiconductor material to form a nanomesh including suspended semiconductor nanowires. Gate dielectrics, a gate electrode, and a gate cap dielectric are formed over the nanomesh. A dielectric spacer is formed around the gate electrode. The semiconductor materials in the two pad regions and physically exposed portions of the nanomesh are removed employing the dielectric spacer and the gate cap dielectric as an etch mask. A source region and a drain region are epitaxially grown from end surfaces of the nanomesh.
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